1. Field of the Invention
The present invention relates to an information processing apparatus and a method of setting the frequency of a clock to be supplied from a processor.
2. Description of the Related Art
Conventionally, for an information processing apparatus, a method of automatically resetting clock frequency upon upgrading the CPU has been proposed (e.g., Japanese Patent Application Laid-Open No. 06-083476). With this method, in an information processing apparatus capable of changing the CPU clock frequency, data about the CPU clock frequency, which is supplied from an external storage device, is written in a specific storage means of the information processing apparatus. A corresponding clock is generated on the basis of the data in the storage means and replaced with the conventional clock, thereby resetting the clock frequency.
In addition, a method of easily generating a system clock optimum for a system from a predetermined clock has been proposed (e.g., Japanese Patent Application Laid-Open No. 09-319458). With this method, the frequency division ratio of clock frequency division is stored in a rewritable storage means, the frequency of a clock generated by a generation means is detected, and the frequency division ratio stored in the storage means is rewritten in correspondence with the detected clock frequency.
In the above-described prior art, however, if a plurality of information processing apparatuses having different operable clock frequencies are connected to a single bus such as a PCI bus, the clock frequencies cannot be reset easily.
More specifically, when all information processing apparatuses can operate at 66 MHz, the clock frequency is reset to 66 MHz. However, if an information processing apparatus compatible with only 33-MHz operation is added after setting, the remaining information processing apparatuses cannot be changed to 33-MHz operation.